Instruction-level parallelism, made concrete. The Elbrus machines of the Lebedev Institute (Elbrus-1, 1978; the modern VLIW line still shipping) issued many instructions at once. This panel is runnable: feed N independent operations to a width-W machine and watch them finish in ⌈N/W⌉ cycles — then add a serial fraction s and watch Amdahl’s law clamp the speedup at 1/s, no matter how wide the machine grows.
source The Elbrus computers, Lebedev Institute of Precision Mechanics and Computer Engineering; V. Pentkovsky, B. Babayan; Elbrus-1 (1978); the modern Elbrus VLIW line continues. Room: THE MACHINE — the Lebedev/Elbrus lineage after BESM. Rendered, not quoted.
The line runs MESM → BESM → Elbrus. Under Vsevolod Burtsev and later Boris Babayan, the institute built Elbrus-1 (1978) — a tagged, high-performance multiprocessor — then Elbrus-2 and the wide VLIW machines that carry the name today.
contested Babayan later claimed the Elbrus was the world’s first superscalar machine (out-of-order, multiple issue). Western historians dispute the priority and the exact definition used. The claim stays AMBER; the ILP math below is LIT.
A width-W machine issues up to W instructions per cycle. If N instructions are independent — no result feeds the next input — they pack into ⌈N/W⌉ cycles instead of N.
Superscalar hardware finds the independence at run time; VLIW (the Elbrus way) has the compiler pack the wide instruction word ahead of time. Either way the ceiling is the same: cycles = ⌈N/W⌉, speedup N / ⌈N/W⌉ → W.
The idea did not stop:
Elbrus-1 (1978) → Elbrus-2 → the modern Elbrus VLIW CPUs (MCST, still shipping). Pentkovsky went on to work on Intel’s Pentium line; alumni of the institute influenced Western superscalar and VLIW designs.
Whatever the priority dispute settles, the through-line is real: one Soviet institute pushed multiple-issue hardware for decades, and the people carried the ideas outward.
Set the machine width W, the number of operations N, and the serial fraction s — the share of the work that must run in order because each step depends on the last.
Two questions, one machine: how fast do N independent ops finish, and how fast can the whole program go once a fraction s is forced serial?
ILP — N independent ops on a width-W machine
cycles = ⌈N/W⌉ = — · speedup = N / cycles = — (→ W as N grows)
| N | ⌈N/W⌉ | speedup |
|---|
AMDAHL’S LAW — a serial fraction s caps the whole program
speedup(s, W) = 1 / ( s + (1−s)/W ) → 1/s as W → ∞
| W | 1/(s+(1−s)/W) | ≤ 1/s ? |
|---|
ceiling as the machine grows infinitely wide: 1/s = —
| anchor | expected | got | ok |
|---|
Anchors: W=4, N=100 → 25 cycles, speedup 4.0; Amdahl s=0.2, W=4 → —; W→∞ → 5. Every witness re-checks live.
Width is free only for independent work. A chain — a → b → c, each needing the last — runs one step per cycle no matter how wide the machine. That serial share is s.
The parallel part (1−s) shrinks by W; the serial part s does not shrink at all. So the runtime floor is s of the original, and speedup can never beat 1/s. Set s=0 and the cap is W; set s=1 and the cap is 1.
“More execution units means proportional speedup.” Cut — Amdahl bounds it. Doubling W does not double a program with any serial fraction; the gain saturates at 1/s.
“An infinitely wide machine runs infinitely fast.” Cut. As W→∞ the speedup tends to 1/s, a finite ceiling — not infinity — whenever s>0.
“The Elbrus superscalar priority is settled fact.” Left AMBER, not buried. The claim is contested by definition and by date; we render the math, not the medal.
The red move: throw out the serial fraction and claim speedup = W for the whole program, always. It pretends every dependency chain can be parallelized away.
Assert speedup = W and the witness (5) re-checks the bound speedup ≤ 1/s: for a mostly-serial stream W overshoots 1/s, the check fails, and the badge turns red. No machine outruns its serial fraction. The attack is caught.