Pop the lid off a 1985 Nintendo and there is almost nothing inside: two custom Ricoh chips, two kilobytes of RAM, and a slot. The genius is in the division of labor — one chip for thinking, one for painting — and in the cartridge, which kept upgrading the machine for a decade after launch. This is the full teardown and the spec sheet: every chip, bus, and trick that turned eight bits into Mario.
The Four Natures
each piece emerges by one of four natures
The Idea
the three-beat story
The whole machine is essentially two custom Ricoh chips. The 2A03 thinks and makes sound — a MOS 6502 CPU core with an audio unit fused onto the same die. The 2C02 paints — a picture processor with its own separate memory and its own job. They share a tiny 8-bit bus and split the work cleanly, which is why so little silicon could do so much.
The 2C02 never stores a full screen image. It assembles 256×240 on the fly from small 8×8 tiles — a background grid (the nametables) plus up to 64 movable sprites. Only 8 sprites may share a scanline, which is the origin of the era's signature flicker. The master palette holds 54 colors; about 25 reach the screen at once. Constraints, everywhere, made into a look.
With only 2 KB of RAM and a fixed 64 KB address space, the base machine should have aged out fast. It didn't, because the cartridge carried a MAPPER — a chip that bank-switches program and tile memory in and out, and on later boards (MMC3) even counts scanlines to split the screen. Cartridges kept expanding the console from the outside, which is how 1985 hardware ran 1990 games.
The Teardown — Click a Chip
almost nothing is inside a 1985 Nintendo: two custom Ricoh chips, two kilobytes of RAM, and a slot. Click a block to read its spec; the buses show what talks to what. An accurate block diagram of the NES architecture (NTSC) — a teardown illustration, not a schematic.
The Spec Sheet
the headline numbers — the spec edition
1.789773 MHz (NTSC) · 8-bit · 16-bit address bus (64 KB) · no decimal mode · APU on-die.
256×240 @ ~60 Hz · 64 sprites, 8 per scanline · 54-color palette (~25 on screen) · separate 16 KB address space.
5 channels: 2 pulse, 1 triangle, 1 noise, 1 DPCM sample channel.
RAM $0000–$07FF (mirrored) · the rest comes from the cartridge.
Bank-switching (MMC1, MMC3, …) extends ROM, RAM, and adds scanline IRQs.
8-bit serial shift-register pads · composite video from the PPU directly.
The Reckoning
the teardown, and the honesty about it
The Domain: Open It and Spec It
the teardown
- EXEREÚNESIS's first sphere: take a real, made machine apart down to the chip and write the honest spec.
- >A new kind of UD0 sphere — not a story-world but a technical anatomy. Built to grow: one teardown at a time.
Two-Layer Honest
datasheet vs lore
- Settled: the chips, clocks, memory map, sprite/scanline limits, and the mapper mechanism are documented, verifiable hardware facts.
- Flagged as lore: the blinking-power-light woe is real and traced to the wear-prone 72-pin connector and the 10NES lockout handshake — but the exact stories around the lockout-chip arms race get embellished. Stated as the well-supported version, not the tall tale.
Render, Not Invent
sourced
- Summarized from the public technical record — datasheets and the homebrew/preservation community (e.g. NESdev). Nintendo and Ricoh are cited, not minted.
- No ROMs, BIOS, or copyrighted code are reproduced. Emergents are physical components; the block diagram is an illustration, not a schematic.
The Roster
every chip, bus, and part as an ACI .agent — each a birth certificate & a nature (12)
