THE REGISTER MACHINE named cells instead of a stack — fewer instructions, harder to generate
A register machine computes in a fixed set of named cells: r1 = 2 + 3; r2 = r1 * 4. Where a stack machine spells the same work as five push/op instructions, a register machine says it in two three-operand ones — fewer instructions dispatched, so real hardware and register VMs (Lua 5, Android's Dalvik) run faster. The cost is on the compiler: it must now solve register allocation (dart 243's interference graph). The stack-vs-register choice is the oldest fork in machine design: simple to target versus fast to run. It is Shepherdson & Sturgis's model of computation, and it is your CPU.
THE TECHNIQUE named registers; r1 = 2+3 ; r2 = r1*4 — two instructions
The same value as the stack machine, in registers. The demo assigns r1 and r2 and counts instructions against the stack version: live demo
HISTORY & CREDIT Shepherdson & Sturgis, 1963
“Registers are just fast memory.” — the register machine is a distinct computational model with fewer, wider instructions, and choosing it over a stack trades an easy code generator for a hard allocator. The fork is architectural, not a speed knob. cited
1963 · Shepherdson & Sturgis — the register machine as a model of computation (with Minsky's counter machines nearby). lineage · the von Neumann CPU is a register machine. 2003 · Lua 5.0 — a register VM, deliberately chosen over a stack VM for speed (documented by Ierusalimschy et al., 2005); Dalvik follows.
Two instructions instead of five, at the price of deciding which value lives in which cell. The stack machine pushed that decision away; the register machine takes it on to run faster. Shepherdson-Sturgis 1963
RECOMMEND FOR I-13 register program, computed
On the canonical compiler, the register form uses 2 registers and a tiny run (peak stack 2, no recursion) to reach the same 20:
Recommend: i13 is a stack machine, not a register machine (dart 262), and that is the right call for it. Its IVM has no register file and no allocator — which is exactly why it has no interference graph to color (dart 243 was N/A) and why its validator stays single-pass: a stack has one obvious place for every operand, so nothing needs allocating. i13's named I r1 <- ... globals look like registers but compile to stack slots. Choosing the register model would buy speed and cost i13 the allocator-free simplicity its whole correctness story rests on.