THE NEW VECTORS native mode gets its own interrupt table — distinct from the 6502’s
When an interrupt fires, the CPU reads a vector — a fixed address holding the handler’s location. The 6502’s live at the top of memory ($FFFA NMI, $FFFC reset, $FFFE IRQ). The 65816 keeps those for emulation mode but adds a separate set of native-mode vectors just below them, so a native program can install 16-bit handlers without disturbing the 6502-compatible ones. It also adds a new software interrupt, COP, with its own vector. Same mechanism, two tables — the interrupt system permuted so both machines coexist.
THE TECHNIQUE native interrupt vectors distinct from the emulation ($FFxx) set
The demo shows the emulation NMI vector ($FFFA) and the distinct native NMI vector ($FFEA): live demo
HISTORY & CREDIT 65C816 native vectors · COP
“There is one interrupt table.” — the 65816 has two: the 6502’s for emulation, a separate set for native mode. cited
emulation · the 6502 vectors — $FFFA/$FFFC/$FFFE. native · a distinct set just below, for 16-bit handlers — plus COP, a new software interrupt. the coexistence · both tables live at once, so the two modes share the chip cleanly.
Two interrupt tables in one chip — the 6502’s kept, the native mode’s added beside it. vectors
RECOMMEND FOR I-13 the two tables, on the compiler
On the canonical compiler, the emulation NMI vector is $FFFA (65530) and the native NMI vector is $FFEA (65514) — distinct:
$ i13 run pm_newvectors.i13 # NMI vector by mode
RUN OK · 34 step(s) · peak stack 3 · call depth 1
emu_v = 65530 -- $FFFA (emulation)
nat_v = 65514 -- $FFEA (native)
distinct_vectors = 1
Recommend as a NULL — a second lookup table. The native vectors are additional fixed addresses selected by mode — an encoding/dispatch choice (B44), spec-pinned (B39). No new invariant. NULL — the permutation giving native mode its own interrupt entry points beside the 6502’s.