The 6502 sees 64KB, full stop — 16 address lines. The 65816 adds a Data Bank Register (DBR): a 24-bit address is bank : offset, (DBR « 16) | offset, opening 16MB (256 banks of 64KB). Set DBR=0 and data access is the 6502’s first 64KB (the special case); set DBR=2 and the same 16-bit offset now reads bank 2. It is how the SNES maps ROM, RAM, and registers across a huge space while keeping 6502-style 16-bit instructions for the common case — a whole extra byte of address, hiding above the old sixteen bits.
The demo forms a 24-bit address with DBR=0 (0x001234, the 6502) and DBR=2 (0x021234, bank 2): live demo
“An 8-bit-family CPU tops out at 64KB.” — a bank byte lifts the 65816 to 16MB while keeping 16-bit offsets. cited
A byte of bank stacked above sixteen bits of offset — the 6502’s address space as one bank of two hundred fifty-six. address extension
On the canonical compiler, offset 0x1234 with DBR=0 is 0x001234, and with DBR=2 is 0x021234 (135732):