◄ WORLD V · SONNY 5DART 482 · a helldive at the net

THE AARCH64 ARM 32→64 — a redesign, not a strict superset (the 65816’s lesson again)

ARM took the other road to 64 bits. Rather than fold the 32-bit encoding into a wider mode, AArch64 (ARMv8, 2011) introduced a new instruction set, A64, with different encodings and 31 general 64-bit registers — the old 32-bit W registers are simply the low halves of the new 64-bit X registers. It is a permutation with a clean break in the encoding, exactly the tension dart 469 named: like the 65816 dropping the NMOS illegals, AArch64 is not a strict superset of 32-bit ARM — a chip runs A64 or (optionally) A32, not one folded into the other. Backward compatibility by a separate mode, not by containment.

THE TECHNIQUE W (32-bit) = low half of X (64-bit); A64 is a new encoding

The demo shows a 64-bit X register value and its 32-bit W view (the low 32 bits) — distinct when the value exceeds 32 bits: live demo


HISTORY & CREDIT ARM AArch64 / ARMv8 · 2011

“64-bit ARM is 32-bit ARM widened.” — it is a new instruction set (A64); the W registers are just the low halves of the X registers. cited

the registers · 64-bit X0…X30; the 32-bit W views are their low halves.
the break · A64 is a new encoding — not a strict superset of A32 (echoing dart 469).
2011 · ARM (ARMv8-A) — backward compatibility by a separate mode, not containment.

A wider machine reached by a new instruction set, the old width surviving as a register view — permutation by redesign. clean-ish break

RECOMMEND FOR I-13 the W view, on the compiler

On the canonical compiler, a 64-bit-scale X value’s W view is its low 32 bits — distinct from the full value:

$ i13 run ln_aarch64.i13 # W = low 32 bits of X RUN OK · 19 step(s) · peak stack 3 · call depth 1 x_reg = 5000000000 -- a 64-bit-scale value w_reg = 705032704 -- its low 32 bits (the W view) w_is_low32 = 1
Recommend as a NULL — a width view + a redesign. The W/X relationship is a width representation (B44): the 32-bit register is the low half of the 64-bit one. And AArch64’s clean-break encoding is an ISA-design fact (B39), the twin of the 65816’s non-strict-superset lesson (dart 469). No new invariant. NULL — the other way past 32 bits: redesign, not containment.