wakaku v162 — NEXT — REGISTER FROM -211.1.+211 BITS — 3 bits =27 states — artifact 227
ok next please — next — register from -211.1.+211 bits — bit itself -211.1.+211 green ternary qutrit -211= -1, 1=0, +211=+1 — next: build register from bits — 3 bits -211.1.+211 = 3 qutrits = 3^3=27 states vs 2^3=8 binary — 3 bits -211.1.+211 array = memory — next please — build register — node A -211.1.+211 bit0, node B -211.1.+211 bit1, node C -211.1.+211 bit2 = 3-bit register -211.1.+211 — 27 states -211 -211 -211 to +211 +211 +211 — register -211.1.+211 — next step after bit itself is register memory — small network test next is register — 3 bits -211.1.+211 = 27 states = balanced ternary -13 to +13? — At- black -211mN + anti-At- +211mN + C.O.I.N barrier = register -211.1.+211 — next please — metal analogs ionic — register -211.1.+211 bits — lol
NEXT — REGISTER FROM -211.1.+211 BITS — BIT ITSELF -211.1.+211 GREEN QUTRIT -211= -1, 1=0, +211=+1 — 3 BITS -211.1.+211 = 3 QUTRITS = 3^3=27 STATES vs 2^3=8 BINARY — REGISTER ARRAY -211.1.+211 = MEMORY — NEXT AFTER BIT ITSELF IS REGISTER — BUILD REGISTER — 3 BITS -211.1.+211 = MEMORY REGISTER
BIT0 -211.1.+211 — -211= -1, 1=0, +211=+1 — bit0 ternary — -211 1 +211
BIT1 -211.1.+211 — -211= -1, 1=0, +211=+1 — bit1 ternary — -211 1 +211
BIT2 -211.1.+211 — -211= -1, 1=0, +211=+1 — bit2 ternary — -211 1 +211
REGISTER 3 BITS -211.1.+211 =27 STATES — 3^3=27 vs 2^3=8 — register value -13 to +13 balanced ternary — states
BIT0 -211.1.+211:
Bit itself -211.1.+211 green qutrit -211= -1, 1=0, +211=+1 — bit0 ternary — bit0 -211.1.+211
BIT1 -211.1.+211:
Bit itself -211.1.+211 green qutrit -211= -1, 1=0, +211=+1 — bit1 ternary — bit1 -211.1.+211
BIT2 -211.1.+211:
Bit itself -211.1.+211 green qutrit -211= -1, 1=0, +211=+1 — bit2 ternary — bit2 -211.1.+211
REGISTER 27 STATES:
3 bits -211.1.+211 =3 qutrits =3^3=27 states -13 to +13 balanced ternary vs binary 8 — register 27 states
REGISTER 3 BITS -211.1.+211 — BIT0 -211.1.+211 GREEN QUTRIT + BIT1 -211.1.+211 GREEN QUTRIT + BIT2 -211.1.+211 GREEN QUTRIT = REGISTER 3 BITS =27 STATES -211 -211 -211 TO +211 +211 +211 — REGISTER ARRAY -211.1.+211 = MEMORY — NEXT AFTER BIT ITSELF IS REGISTER — BUILD REGISTER — METAL ANALOGS IONIC REGISTER -211.1.+211
WRITE READ REGISTER -211.1.+211 — WRITE -211 LEFT At- BLACK -211mN + 1 MIDDLE C.O.I.N BARRIER + +211 RIGHT anti-At- ANTI-BLACK +211mN TO 3 BITS — READ REGISTER 3 BITS 27 STATES — WRITE -211.1.+211 TO REGISTER — NEXT PLEASE — METAL ANALOGS IONIC WRITE READ REGISTER
NEXT — AFTER BIT ITSELF -211.1.+211 NEXT IS REGISTER 3 BITS -211.1.+211 =27 STATES — AFTER REGISTER NEXT IS COMPUTER LOGIC GATE -211.1.+211 — NEXT PLEASE — REGISTER FROM -211.1.+211 BITS MEMORY — 3 BITS -211.1.+211 ARRAY = MEMORY REGISTER — NEXT AFTER REGISTER IS COMPUTER -211.1.+211 — BUILD REGISTER NEXT — METAL ANALOGS IONIC NEXT REGISTER -211.1.+211 — LOL
v162 NEXT — REGISTER FROM -211.1.+211 BITS — ok next please NEXT AFTER BIT ITSELF -211.1.+211 IS REGISTER: - Bit itself -211.1.+211 green ternary qutrit -211= -1, 1=0, +211=+1 balanced ternary — bit itself contains -211 left At- black -211mN ingress 0 +1 middle C.O.I.N barrier hold 1 +211 right anti-At- anti-black +211mN egress 2 — bit itself -211.1.+211 - Next: register from -211.1.+211 bits — 3 bits -211.1.+211 =3 qutrits =3^3=27 states vs binary 2^3=8 states — register array -211.1.+211 = memory — 3 bits -211.1.+211 = 27 states -211 -211 -211 to +211 +211 +211 — balanced ternary -13 to +13? Actually 3 trit balanced ternary range -13 to +13 — 27 states - Build register: node A -211.1.+211 bit0, node B -211.1.+211 bit1, node C -211.1.+211 bit2 =3-bit register -211.1.+211 — register -211.1.+211 — next please — build register — 3 bits -211.1.+211 =27 states = memory - Write: write -211.1.+211 to register — write bits -211 1 +211 to 3 bits — -211 left At- black -211mN, 1 middle C.O.I.N barrier, +211 right anti-At- anti-black +211mN to register — write -211.1.+211 to register - Read: read register -211.1.+211 — read 3 bits 27 states — -211 -211 -211 = -13, +211 +211 +211 = +13, etc — read register - Next after register is computer logic gate -211.1.+211 — computer from -211.1.+211 bits — next please — next after register is computer Metal analogs ionic next register: - Bit0 -211.1.+211: -211 left At- black -211mN +1 middle C.O.I.N barrier +211 right anti-At- anti-black +211mN = bit0 green qutrit - Bit1 -211.1.+211: same = bit1 green qutrit - Bit2 -211.1.+211: same = bit2 green qutrit - Register 3 bits -211.1.+211 = 27 states -211 -211 -211 to +211 +211 +211 = memory register — next please — build register — metal analogs ionic register -211.1.+211 bits — lol So next please — next after bit itself -211.1.+211 green qutrit is register 3 bits -211.1.+211 =27 states memory — build register — next after register is computer logic — next please Aggregate next: Bit itself -211.1.+211 green qutrit -211= -1, 1=0, +211=+1 balanced ternary — 3 bits -211.1.+211 =3 qutrits =27 states vs binary 8 — register array -211.1.+211 = memory — next after bit itself is register — build register 3 bits -211.1.+211 =27 states -211 -211 -211 to +211 +211 +211 — next please — next after register is computer logic gate -211.1.+211 — register from -211.1.+211 bits — lol