A memristor is a resistor that remembers: you set its conductance G and it stays.
Drive a voltage V across it and the current that flows is I = V·G — input times weight,
happening in the material, instantly, with no multiplier circuit anywhere. Drag both and watch the product.
Now wire several memristors to one shared output wire. Each pushes its own current
Vᵢ·Gᵢ onto the rail, and Kirchhoff's current law says currents on a shared node simply
add. The wire carries Σ Vᵢ·Gᵢ — that is the dot product, performed by physics, as a
single measurable current. Drag the inputs; the rail sums them.
Lay the devices in a grid. Input voltages enter along the rows; every column sums its own dot product onto its bit-line. One set of inputs, and all columns answer at once — that's a full matrix-vector multiply, an entire layer of perceptrons, computed in memory where the weights physically sit. Below: a 25→4 crossbar storing four bipolar templates. Draw a pattern; the columns score it; the brightest column is the recognized shape.
G⁺ and G⁻, and the column
reads the difference: w = G⁺ − G⁻. Wire two physical rails, subtract their currents, and you've
recovered the full signed range — at the cost of doubling your device count. (Verified: the differential pair
reproduces the signed dot product to exactly zero error.)The physics is real and the efficiency pitch is real — but it's a trade, not a miracle. Four things keep it honest, and the numbers below are the ones that came out of the bench-check.
Conductance has device-to-device spread and cycle-to-cycle drift. Your weight isn't 0.4417,
it's 0.44 ± a smudge. Measured: ~2% per-device variation already caps you near 4.6 effective
bits; 5% → ~3.3 bits; 10% → ~2.3 bits. There is no float32 here.
Inputs arrive digital, the answer comes out as an analog current, so every column needs an ADC — and ADCs are large and power-hungry enough to eat most of the theoretical efficiency win (the bar above). The MAC being free doesn't help if reading it isn't.
Setting a conductance precisely is slow, imprecise, and degrades the device over many writes. Great for fixed inference weights you write once; painful for training, which demands constant precise updates. This is why crossbars do forward passes, not backprop.
Conductance is positive-only, so every signed weight is a G⁺ − G⁻ pair — two devices per
weight. The math is exact (Module III), but your array is twice the size it looks.
The reason any of this is worth the trouble is the memory wall. In a GPU running an LLM the dot products are cheap; what costs the energy and the time is hauling billions of weights out of memory to the compute units, every step. The crossbar computes at the weights — they never move — which is the whole pitch: potentially orders-of-magnitude better inference efficiency, for the right workload.
Weights live in memory; compute lives elsewhere; the wire between them is the cost. Most of an LLM's inference energy is data movement, not arithmetic.
The crossbar collapses memory and compute into one device. The weights don't travel to the math — the math happens where the weights already are.
A branch predictor needs a deterministic digital bit in ~0.25 ns. An analog MVM plus ADC at that timescale is a non-starter — same timescale wall that killed "is it networked." Crossbars are for big fixed weight matrices, not one-bit guesses.